Invention Grant
- Patent Title: Optimized solder pads for microelectronic components
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Application No.: US15224960Application Date: 2016-08-01
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Publication No.: US10014274B2Publication Date: 2018-07-03
- Inventor: Tymon Barwicz , Yves Martin , Jae-Woong Nah
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/00 ; H01L25/16 ; H01L25/00

Abstract:
A multi-chip system includes a top chip stack element comprising a top chip having two major surfaces and top solder pads arrayed along a plane of one of the major surfaces; a bottom chip stack element comprising a bottom substrate having two major surfaces and bottom solder pads arrayed along a plane of one of the major surfaces; one or more solder reservoir pads connected to one or more of the top solder pads or of the bottom solder pads; and solder material; and wherein at least one of the top solder pads is connected to one of the bottom solder pads by one of the solder material.
Public/Granted literature
- US20170141072A1 OPTIMIZED SOLDER PADS FOR MICROELECTRONIC COMPONENTS Public/Granted day:2017-05-18
Information query
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