Invention Grant
- Patent Title: Electromigration sign-off methodology
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Application No.: US15271301Application Date: 2016-09-21
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Publication No.: US10042967B2Publication Date: 2018-08-07
- Inventor: Yu-Tseng Hsien , Chin-Shen Lin , Ching-Shun Yang , Jui-Feng Kuan
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: G06F17/00
- IPC: G06F17/00 ; G06F17/50 ; H01L21/768 ; G01R31/28

Abstract:
The present disclosure relates to an electromigration (EM) sign-off methodology that determines EM violations of components on different electrical networks of an integrated chip design using separate temperatures. In some embodiments, the method determines a plurality of actual temperatures that respectively correspond to one or more components within one of a plurality of electrical networks within an integrated chip design. An electromigration margin is determined for a component within a selected electrical network of the plurality of electrical networks. The electromigration margin is determined at one of the plurality of actual temperatures that corresponds to the component within the selected electrical network. The electromigration margin is compared to an electromigration metric to determine if an electromigration violation of the component within the selected electrical network is present. The use of separate actual temperatures for components on different electrical networks mitigates false EM violations, thereby reducing loss of design overhead.
Public/Granted literature
- US20170141003A1 ELECTRMIGRATION SIGN-OFF METHODOLOGY Public/Granted day:2017-05-18
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