Invention Grant
- Patent Title: Programming memories with multi-level pass signal
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Application No.: US15907826Application Date: 2018-02-28
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Publication No.: US10043574B2Publication Date: 2018-08-07
- Inventor: Shyam Sunder Raghunathan , Pranav Kalavade , Krishna K. Parat , Charan Srinivasan
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C11/56 ; G11C16/34 ; G11C16/12

Abstract:
Methods of operating a memory include applying a first voltage level to control gates of a plurality of memory cells selected to be programmed while applying a second voltage level to a respective data line for each memory cell of the plurality of memory cells; increasing the voltage level applied to the respective data line for memory cells of a first subset of memory cells to a third voltage level then increasing the voltage level applied to the control gates of the plurality of memory cells to a fourth voltage level; increasing the voltage level applied to the respective data line for each memory cell of a second subset of memory cells of the plurality of memory cells to a fifth voltage level then; and after increasing the voltage level applied to the respective data line for each memory cell of the second subset of memory cells to the fifth voltage level, increasing the voltage level applied to the control gates of the plurality of memory cells to a sixth voltage level.
Public/Granted literature
- US20180190347A1 PROGRAMMING MEMORIES WITH MULTI-LEVEL PASS SIGNAL Public/Granted day:2018-07-05
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