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公开(公告)号：US20160307622A1
公开(公告)日：2016-10-20
申请号：US15189178
申请日：2016-06-22
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shyam Sunder Raghunathan , Pranav Kalavade , Krishna K. Parat , Charan Srinivasan
CPC classification number: G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/12 , G11C16/3427
Abstract: Methods of operating a memory include applying a multi-step pass voltage to a plurality of memory cells selected for a programming operation, applying a programming pulse to the plurality of memory cells selected for the programming operation after applying a voltage level of a particular step of the multi-step pass voltage to the plurality of memory cells selected for the programming operation, applying a particular voltage level to any data lines coupled to a first subset of memory cells of the plurality of memory cells selected for the programming operation prior to applying a voltage level of a certain step of the multi-step pass voltage, and applying the particular voltage level to any data lines coupled to a second subset of memory cells of the plurality of memory cells selected for the programming operation only after applying the voltage level of the certain step of the multi-step pass voltage.
Abstract translation: 操作存储器的方法包括对选择用于编程操作的多个存储器单元施加多级通过电压，在将编程脉冲施加到编程操作所选择的多个存储器单元之后，施加特定步骤的电压电平 向被选择用于编程操作的多个存储器单元的多步通过电压，将特定电压电平施加到耦合到在应用编程操作之前被选择用于编程操作的多个存储器单元中的存储器单元的第一子集的任何数据线 多级通过电压的某一步骤的电压电平，并且将特定电压电平施加到仅在施加电压电平之后耦合到被选择用于编程操作的多个存储器单元的存储器单元的第二子集的任何数据线 多步通过电压的一定步骤。
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公开(公告)号：US20160019949A1
公开(公告)日：2016-01-21
申请号：US14334946
申请日：2014-07-18
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shyam Sunder Raghunathan , Pranav Kalavade , Krishna K. Parat , Charan Srinivasan
CPC classification number: G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/12 , G11C16/3427
Abstract: Memories and methods for programming memories with multi-level pass signals are provided. One method includes programming cells of the memory selected to be programmed to a particular target data state of the memory, using program disturb to program cells of the memory selected to be programmed to target data states that are lower than the particular target data state while programming cells of the memory selected to be programmed to the particular target data state, and boosting a channel voltage for cells of the memory selected to be programmed to the target data states that are lower than the particular target data state. Boosting may include using a multi-step pass signal.
Abstract translation: 提供了用于编程具有多级通过信号的存储器的存储器和方法。 一种方法包括将选择要编程的存储器的单元编程为存储器的特定目标数据状态，使用程序干扰来编程选择要编程的存储器的单元，以在编程期间将目标数据状态低于特定目标数据状态 将存储器的单元选择为被编程到特定目标数据状态，以及将选择要编程的存储器的单元的通道电压提升到低于特定目标数据状态的目标数据状态。 升压可能包括使用多步通过信号。
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公开(公告)号：US10043574B2
公开(公告)日：2018-08-07
申请号：US15907826
申请日：2018-02-28
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shyam Sunder Raghunathan , Pranav Kalavade , Krishna K. Parat , Charan Srinivasan
Abstract: Methods of operating a memory include applying a first voltage level to control gates of a plurality of memory cells selected to be programmed while applying a second voltage level to a respective data line for each memory cell of the plurality of memory cells; increasing the voltage level applied to the respective data line for memory cells of a first subset of memory cells to a third voltage level then increasing the voltage level applied to the control gates of the plurality of memory cells to a fourth voltage level; increasing the voltage level applied to the respective data line for each memory cell of a second subset of memory cells of the plurality of memory cells to a fifth voltage level then; and after increasing the voltage level applied to the respective data line for each memory cell of the second subset of memory cells to the fifth voltage level, increasing the voltage level applied to the control gates of the plurality of memory cells to a sixth voltage level.
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Patent Agency Ranking
公开(公告)号：US09922704B2
公开(公告)日：2018-03-20
申请号：US15189178
申请日：2016-06-22
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shyam Sunder Raghunathan , Pranav Kalavade , Krishna K. Parat , Charan Srinivasan
CPC classification number: G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/12 , G11C16/3427
Abstract: Methods of operating a memory include applying a multi-step pass voltage to a plurality of memory cells selected for a programming operation, applying a programming pulse to the plurality of memory cells selected for the programming operation after applying a voltage level of a particular step of the multi-step pass voltage to the plurality of memory cells selected for the programming operation, applying a particular voltage level to any data lines coupled to a first subset of memory cells of the plurality of memory cells selected for the programming operation prior to applying a voltage level of a certain step of the multi-step pass voltage, and applying the particular voltage level to any data lines coupled to a second subset of memory cells of the plurality of memory cells selected for the programming operation only after applying the voltage level of the certain step of the multi-step pass voltage.
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公开(公告)号：US09396791B2
公开(公告)日：2016-07-19
申请号：US14334946
申请日：2014-07-18
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shyam Sunder Raghunathan , Pranav Kalavade , Krishna K. Parat , Charan Srinivasan
CPC classification number: G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/12 , G11C16/3427
Abstract: Memories and methods for programming memories with multi-level pass signals are provided. One method includes programming cells of the memory selected to be programmed to a particular target data state of the memory, using program disturb to program cells of the memory selected to be programmed to target data states that are lower than the particular target data state while programming cells of the memory selected to be programmed to the particular target data state, and boosting a channel voltage for cells of the memory selected to be programmed to the target data states that are lower than the particular target data state. Boosting may include using a multi-step pass signal.
Abstract translation: 提供了用于编程具有多级通过信号的存储器的存储器和方法。 一种方法包括将选择要编程的存储器的单元编程为存储器的特定目标数据状态，使用程序干扰来编程选择要编程的存储器的单元，以在编程期间将目标数据状态低于特定目标数据状态 将存储器的单元选择为被编程到特定目标数据状态，以及将选择要编程的存储器的单元的通道电压提升到低于特定目标数据状态的目标数据状态。 升压可能包括使用多步通过信号。
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公开(公告)号：US20180190347A1
公开(公告)日：2018-07-05
申请号：US15907826
申请日：2018-02-28
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shyam Sunder Raghunathan , Pranav Kalavade , Krishna K. Parat , Charan Srinivasan
CPC classification number: G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/12 , G11C16/3427
Abstract: Methods of operating a memory include applying a first voltage level to control gates of a plurality of memory cells selected to be programmed while applying a second voltage level to a respective data line for each memory cell of the plurality of memory cells; increasing the voltage level applied to the respective data line for memory cells of a first subset of memory cells to a third voltage level then increasing the voltage level applied to the control gates of the plurality of memory cells to a fourth voltage level; increasing the voltage level applied to the respective data line for each memory cell of a second subset of memory cells of the plurality of memory cells to a fifth voltage level then; and after increasing the voltage level applied to the respective data line for each memory cell of the second subset of memory cells to the fifth voltage level, increasing the voltage level applied to the control gates of the plurality of memory cells to a sixth voltage level.
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公开(公告)号：US20150170756A1
公开(公告)日：2015-06-18
申请号：US14632556
申请日：2015-02-26
Applicant: Micron Technology, Inc.
Inventor： Akira Goda , Mark Helm , Pranav Kalavade , Charan Srinivasan
CPC classification number: G11C16/3427 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C16/30 , G11C16/3418 , G11C16/3454 , G11C16/3459
Abstract: Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying, during a first pass of programming, a first bias voltage value to a source select gate to isolate memory cells from a source, applying a programming voltage to an access line of a page of the memory cells during the first pass of programming, and applying a second bias voltage value to the source select gate to isolate the memory cells from the source during a second pass of programming. Further devices, systems, and methods are disclosed.
Abstract translation: 一些实施例包括存储器设备和编程存储器设备的存储器单元的方法。 一种这样的方法可以包括在编程的第一次通过期间将第一偏置电压值应用于源极选择栅极以将存储器单元与源极隔离，在第一次处理期间将编程电压施加到存储器单元的页面的访问线 编程的通过，以及在源选择栅极施加第二偏置电压值以在第二次编程期间隔离存储器单元与源极。 公开了其它装置，系统和方法。
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公开(公告)号：US09330777B2
公开(公告)日：2016-05-03
申请号：US14632556
申请日：2015-02-26
Applicant: Micron Technology, Inc.
Inventor： Akira Goda , Mark Helm , Pranav Kalavade , Charan Srinivasan
CPC classification number: G11C16/3427 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C16/30 , G11C16/3418 , G11C16/3454 , G11C16/3459
Abstract: Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying, during a first pass of programming, a first bias voltage value to a source select gate to isolate memory cells from a source, applying a programming voltage to an access line of a page of the memory cells during the first pass of programming, and applying a second bias voltage value to the source select gate to isolate the memory cells from the source during a second pass of programming. Further devices, systems, and methods are disclosed.
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