Invention Grant
- Patent Title: Directional patterning methods
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Application No.: US15395310Application Date: 2016-12-30
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Publication No.: US10049918B2Publication Date: 2018-08-14
- Inventor: Chi-Cheng Hung , Ru-Gun Liu , Wei-Liang Lin , Ta-Ching Yu , Yung-Sung Yen , Ziwei Fang , Tsai-Sheng Gau , Chin-Hsiang Lin , Kuei-Shun Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/768 ; H01L21/033 ; H01L21/3115

Abstract:
Directional patterning methods are disclosed herein. An exemplary method includes performing a lithography process to form a pattered hard mask layer over a wafer, wherein the patterned hard mask layer includes a hard mask feature having an associated horizontally-defined characteristic; tuning an etching process to direct etching species in a substantially horizontal direction relative to a horizontal surface of the wafer, such that the etching process horizontally removes portions of the patterned hard mask layer, thereby modifying the horizontally-defined characteristic of the hard mask feature; and forming an integrated circuit feature that corresponds with the hard mask feature having the modified horizontally-defined characteristic. Horizontally-defined characteristic can include a length, a width, a line edge roughness, a line width roughness, a line end profile, other horizontally-defined characteristics, or combinations thereof. In some implementations, the directional patterning method disclosed herein can achieve oblique interconnects and/or slot (rectangular) via interconnects.
Public/Granted literature
- US20180090370A1 Directional Patterning Methods Public/Granted day:2018-03-29
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