Invention Grant
- Patent Title: Speculative enumeration of bus-device-function address space
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Application No.: US15079922Application Date: 2016-03-24
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Publication No.: US10061707B2Publication Date: 2018-08-28
- Inventor: Shanthanand Kutuva Rabindranath , David J. Harriman , Prashant Sethi , Vijayalakshmi Kothandan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G06F13/20
- IPC: G06F13/20 ; G06F12/10 ; G06F13/42

Abstract:
A first device is determined as connected to a first one of a plurality of ports of a root complex. Addresses are assigned corresponding to a first hierarchy of devices including the first device. A second device is determined as connected through a mapping portal bridge at a second one of the ports of the root complex, the second device included in another second hierarchy of devices. A mapping table is generated that corresponds to the mapping portal bridge. The mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space. The first view includes a view of the root complex and the second view includes a view corresponding to the second hierarchy of devices, the first hierarchy of devices being addressed according to the first view.
Public/Granted literature
- US20170185525A1 SPECULATIVE ENUMERATION OF BUS-DEVICE-FUNCTION ADDRESS SPACE Public/Granted day:2017-06-29
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