- 专利标题: Determining multi-patterning step overlay error
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申请号: US15170881申请日: 2016-06-01
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公开(公告)号: US10062543B2公开(公告)日: 2018-08-28
- 发明人: Ajay Gupta , Thanh Huy Ha , Olivier Moreau , Kumar Raja
- 申请人: KLA-Tencor Corporation
- 申请人地址: US CA Milpitas
- 专利权人: KLA-Tencor Corp.
- 当前专利权人: KLA-Tencor Corp.
- 当前专利权人地址: US CA Milpitas
- 代理商 Ann Marie Mewherter
- 主分类号: G06K9/00
- IPC分类号: G06K9/00 ; H01L21/76 ; G01B11/00 ; H01L23/544 ; G06F19/00 ; H01J37/22 ; G03F7/20
摘要:
Methods and systems for determining overlay error between different patterned features of a design printed on a wafer in a multi-patterning step process are provided. For multi-patterning step designs, the design for a first patterning step is used as a reference and designs for each of the remaining patterning steps are synthetically shifted until the synthetically shifted designs have the best global alignment with the entire image based on global image-to-design alignment. The final synthetic shift of each design for each patterning step relative to the design for the first patterning step provides a measurement of relative overlay error between any two features printed on the wafer using multi-patterning technology.
公开/授权文献
- US20160377425A1 DETERMINING MULTI-PATTERNING STEP OVERLAY ERROR 公开/授权日:2016-12-29
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