Various example implementations are directed to circuits and methods for debugging logic circuits utilizing a data bus for communication. According to an example implementation, an apparatus includes a logic circuit configured to communicate data over a data bus according to a communication protocol. The apparatus also includes a logic analyzer circuit coupled to the data bus. The logic analyzer circuit is configured to capture, in response to a control signal, samples of data signals communicated on the data bus. The logic analyzer circuit determines respective pairs of start and end positions of the data transactions in the captured samples. The logic analyzer circuit outputs the samples of the data signals and a set of metadata including the determined pairs of start and end positions of data transactions in the samples.