Invention Grant
- Patent Title: III-N devices in Si trenches
-
Application No.: US15464931Application Date: 2017-03-21
-
Publication No.: US10096682B2Publication Date: 2018-10-09
- Inventor: Sansaptak Dasgupta , Han Wui Then , Sanaz K. Gardner , Seung Hoon Sung , Marko Radosavljevic , Benjamin Chu-Kung , Sherry Taft , Ravi Pillarisetty , Robert S. Chau
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/20 ; H01L21/02 ; H01L21/762 ; H01L29/04 ; H01L29/06 ; H01L21/8258
Abstract:
A trench comprising a portion of a substrate is formed. A nucleation layer is deposited on the portion of the substrate within the trench. A III-N material layer is deposited on the nucleation layer. The III-N material layer is laterally grown over the trench. A device layer is deposited on the laterally grown III-N material layer. A low defect density region is obtained on the laterally grown material and is used for electronic device fabrication of III-N materials on Si substrates.
Public/Granted literature
- US20170207307A1 III-N DEVICES IN SI TRENCHES Public/Granted day:2017-07-20
Information query
IPC分类:
