公开(公告)号：US20170207307A1

公开(公告)日：2017-07-20

申请号：US15464931

申请日：2017-03-21

Applicant: Intel Corporation

Inventor： Sansaptak Dasgupta ,  Han Wui Then ,  Sanaz K. Gardner ,  Seung Hoon Sung ,  Marko Radosavljevic ,  Benjamin Chu-Kung ,  Sherry Taft ,  Ravi Pillarisetty ,  Robert S. Chau

IPC: H01L29/20 ,  H01L29/06 ,  H01L21/02 ,  H01L29/04 ,  H01L21/762

CPC classification number: H01L29/2003 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/76229 ,  H01L21/76232 ,  H01L21/8258 ,  H01L29/045 ,  H01L29/0649 ,  H01L29/0684

Abstract: A trench comprising a portion of a substrate is formed. A nucleation layer is deposited on the portion of the substrate within the trench. A III-N material layer is deposited on the nucleation layer. The III-N material layer is laterally grown over the trench. A device layer is deposited on the laterally grown III-N material layer. A low defect density region is obtained on the laterally grown material and is used for electronic device fabrication of III-N materials on Si substrates.

公开(公告)号：US10096682B2

公开(公告)日：2018-10-09

申请号：US15464931

申请日：2017-03-21

Applicant: Intel Corporation

Inventor： Sansaptak Dasgupta ,  Han Wui Then ,  Sanaz K. Gardner ,  Seung Hoon Sung ,  Marko Radosavljevic ,  Benjamin Chu-Kung ,  Sherry Taft ,  Ravi Pillarisetty ,  Robert S. Chau

IPC: H01L27/108 ,  H01L29/20 ,  H01L21/02 ,  H01L21/762 ,  H01L29/04 ,  H01L29/06 ,  H01L21/8258

Abstract: A trench comprising a portion of a substrate is formed. A nucleation layer is deposited on the portion of the substrate within the trench. A III-N material layer is deposited on the nucleation layer. The III-N material layer is laterally grown over the trench. A device layer is deposited on the laterally grown III-N material layer. A low defect density region is obtained on the laterally grown material and is used for electronic device fabrication of III-N materials on Si substrates.