Invention Grant
- Patent Title: Method for controlling digital fractional frequency-division phase-locked loop and phase-locked loop
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Application No.: US15625449Application Date: 2017-06-16
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Publication No.: US10103741B2Publication Date: 2018-10-16
- Inventor: Peng Gao
- Applicant: Huawei Technologies Co., Ltd.
- Applicant Address: CN Shenzhen
- Assignee: Huawei Technologies Co., Ltd.
- Current Assignee: Huawei Technologies Co., Ltd.
- Current Assignee Address: CN Shenzhen
- Priority: CN201410802184 20141218
- Main IPC: H03L7/197
- IPC: H03L7/197 ; H03L7/081 ; H03L7/085 ; H03L7/091 ; H03L7/099

Abstract:
A method for controlling a digital fractional frequency-division phase-locked loop and a phase-locked loop are disclosed. The phase-locked loop includes a control apparatus, a TDC, a DLF, a DCO, a DIV, and an SDM. The control apparatus performs delay processing on an active edge of a reference clock according to a frequency control word and a frequency division control word to obtain a delayed reference clock; and sends the delayed reference clock to the TDC so that the TDC performs phase discrimination processing on the delayed reference clock and a feedback clock. A control apparatus added to a phase-locked loop may perform delay processing on a reference clock according to a current frequency control word and a current frequency division control word, so that a feedback clock and a delayed reference clock have active edges that approximately correspond in time.
Public/Granted literature
- US20170288686A1 METHOD FOR CONTROLLING DIGITAL FRACTIONAL FREQUENCY-DIVISION PHASE-LOCKED LOOP AND PHASE-LOCKED LOOP Public/Granted day:2017-10-05
Information query
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