Invention Grant
- Patent Title: Gate contact structure over active gate and method to fabricate same
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Application No.: US15266819Application Date: 2016-09-15
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Publication No.: US10192783B2Publication Date: 2019-01-29
- Inventor: Abhijit Jayant Pethe , Tahir Ghani , Mark Bohr , Clair Webb , Harry Gomez , Annalisa Cappellani
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L21/768 ; H01L29/66 ; H01L29/78 ; H01L21/28 ; H01L21/311 ; H01L23/522 ; H01L23/532

Abstract:
Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor structure includes a substrate having an active region and an isolation region. A gate structure has a portion disposed above the active region and a portion disposed above the isolation region of the substrate. Source and drain regions are disposed in the active region of the substrate, on either side of the portion of the gate structure disposed above the active region. A gate contact structure is disposed on the portion of the gate structure disposed above the active region of the substrate.
Public/Granted literature
- US20170004998A1 GATE CONTACT STRUCTURE OVER ACTIVE GATE AND METHOD TO FABRICATE SAME Public/Granted day:2017-01-05
Information query
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