Invention Grant
- Patent Title: Semiconductor device having a multilayer wiring structure
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Application No.: US15785762Application Date: 2017-10-17
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Publication No.: US10204858B2Publication Date: 2019-02-12
- Inventor: Tomoyuki Kirimura
- Applicant: Socionext Inc.
- Applicant Address: JP Yokohama
- Assignee: SOCIONEXT INC.
- Current Assignee: SOCIONEXT INC.
- Current Assignee Address: JP Yokohama
- Agency: Westermann, Hattori, Daniels & Adrian, LLP
- Priority: JP2016-207363 20161021
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/528 ; H01L23/522 ; H01L23/58 ; H01L27/02 ; G06F17/50 ; H01L29/78 ; H01L21/02 ; H01L21/265 ; H01L21/311 ; H01L21/321 ; H01L21/768 ; H01L21/8238 ; H01L23/532 ; H01L27/092 ; H01L29/167 ; H01L27/118 ; H01L29/775
Abstract:
A semiconductor device having a plurality of first wirings (X-direction) which include a first power supply line and a second power supply line, a plurality of third wirings (X-direction) which include a third (fourth) power supply line that is located above the first (second) power supply line and is electrically connected to the first (second) power supply line. The semiconductor device also has a plurality of second wirings (Y-direction) that include a first (second) connection wiring located above the first (second) power supply line and below the third (fourth) power supply line that is electrically connected to the first (second) power supply line and to the third (fourth) power supply line.
Public/Granted literature
- US20180114755A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-04-26
Information query
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