Invention Grant
- Patent Title: Scalable process for the formation of self aligned, planar electrodes for devices employing one or two dimensional lattice structures
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Application No.: US15298771Application Date: 2016-10-20
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Publication No.: US10283629B2Publication Date: 2019-05-07
- Inventor: Michael Engel , Mathias B. Steiner
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/08 ; H01L35/24 ; H01L51/00 ; H01L29/66 ; H01L29/16 ; H01L29/786 ; H01L29/417 ; H01L29/775 ; H01L29/778 ; H01L51/05 ; H01L29/24

Abstract:
A method of forming an electrical device that includes forming a gate dielectric layer over a gate electrode, forming source and drain electrodes on opposing sides of the gate electrode, wherein one end of the source and drain electrodes provides a coplanar surface with the gate dielectric, and positioning a 1D or 2D nanoscale material on the coplanar surface to provide the channel region of the electrical device.
Public/Granted literature
Information query
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