Invention Grant
- Patent Title: System and a method for determining a correction for an output value of a time-to-digital converter within a phase-locked loop
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Application No.: US15575830Application Date: 2016-06-08
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Publication No.: US10298243B2Publication Date: 2019-05-21
- Inventor: Thomas Mayer
- Applicant: Intel IP Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: 2SPL Patentanwälte PartG mbB
- Agent Mani Arabi
- Priority: DE102015110293 20150626
- International Application: PCT/IB2016/053359 WO 20160608
- International Announcement: WO2016/207758 WO 20161229
- Main IPC: H03L7/06
- IPC: H03L7/06 ; H03L7/099 ; H03L7/197 ; H03L7/091 ; H04B1/02

Abstract:
A system for determining a correction for an output value of a time-to-digital converter within a phase-locked loop is provided. The output value relates to a time difference between an input signal and a reference signal supplied to the time-to-digital converter. The system includes a digitally-controlled oscillator configured to generate a first signal independently from the output signal. The first signal has a first frequency different from an integer multiple of a reference frequency of the reference signal. The system further includes a frequency divider configured to generate the input signal for the time-to-digital converter based on the first signal. The input signal has a second frequency being a fraction of the first frequency. Further, the system includes a processing unit configured to calculate the correction using a distribution of output values of multiple time differences.
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