Invention Grant
- Patent Title: 1-16 and 1.5-7.5 frequency divider for clock synthesizer in digital systems
-
Application No.: US15673298Application Date: 2017-08-09
-
Publication No.: US10298382B2Publication Date: 2019-05-21
- Inventor: Charles Qingle Wu , Qi Niu
- Applicant: OmniVision Technologies, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Lathrop Gage LLP
- Main IPC: H04L7/033
- IPC: H04L7/033 ; H04L7/08 ; G11B20/14 ; H03L7/099 ; H03L7/085 ; G06F7/68 ; G06F1/08 ; H03C3/09 ; H03L7/18

Abstract:
A frequency divider unit has a digital frequency divider configured to divide by an odd integer, and a dual-edge-triggered one-shot coupled to double frequency of an output of the digital frequency divider. The frequency divider unit is configurable to divide an input frequency by a configurable ratio selectable from at least non-integer ratios of 1.5, 2.5, and 3.5. In embodiments, the frequency divider unit relies on circuit delays to determine an output pulsewidth, and in other embodiments the output pulsewidth is determined from a clock signal. In embodiments, the unit is configurable to divide an input frequency by a configurable ratio selectable from at least non-integer ratios of 1.5, 2.5, 3.5, 4.5, 5.5, 6.5, and 7.5 as well as many integer ratios including 2, 4, 6, and 8. In embodiments, the digital frequency divider is configurable to provide a 50% duty cycle to the one-shot.
Public/Granted literature
- US20170373825A1 1-16 & 1.5-7.5 Frequency Divider For Clock Synthesizer In Digital Systems Public/Granted day:2017-12-28
Information query