Invention Grant
- Patent Title: Methods of forming hybrid socket structures for package interconnect applications and structures formed thereby
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Application No.: US15720484Application Date: 2017-09-29
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Publication No.: US10303225B2Publication Date: 2019-05-28
- Inventor: Kemal Aygun , Zhichao Zhang , Cemil Geyik , Guneet Kaur
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP.
- Main IPC: H01L23/02
- IPC: H01L23/02 ; G06F1/18 ; H05K3/40 ; H01R13/10 ; H05K7/14

Abstract:
Methods/structures of forming package structures are described. Those methods/structures may include a conductive pin comprising: a cantilever beam portion physically coupled with a first side of a package substrate; a contact pin portion, wherein a terminal end of the contact pin portion is physically and electrically coupled to a board; a housing structure comprising a housing cavity, wherein the contact pin portion is disposed at least partially within the housing cavity; and a conductive material disposed on housing sides and/or adjacent a surface of the housing cavity. The placement of the conductive material is optimized to meet the requirements for either double data rate (DDR) and/or peripheral component interface express (PCIe) interfaces.
Public/Granted literature
Information query
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