- 专利标题: Copper etching integration scheme
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申请号: US16017039申请日: 2018-06-25
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公开(公告)号: US10354954B2公开(公告)日: 2019-07-16
- 发明人: Chih-Wei Lu , Chung-Ju Lee , Hsiang-Huan Lee , Tien-I Bao
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Eschweiler & Potashnik, LLC
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L23/528 ; H01L23/538 ; H01L23/532 ; H01L21/768 ; H01L29/06 ; H01L21/3105 ; H01L21/3213 ; H01L23/522
摘要:
The present disclosure, in some embodiments, relates to an interconnect structure. The interconnect structure has a metal body disposed over a substrate, and a metal projection protruding outward from an upper surface of the metal body. A dielectric layer is disposed over the substrate and surrounds the metal body and the metal projection. A barrier layer separates the metal body and the metal projection from the dielectric layer.
公开/授权文献
- US20180301416A1 COPPER ETCHING INTEGRATION SCHEME 公开/授权日:2018-10-18
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