Invention Grant
- Patent Title: Transistor structure
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Application No.: US15924001Application Date: 2018-03-16
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Publication No.: US10431655B2Publication Date: 2019-10-01
- Inventor: Yen-Ming Chen , Chiu-Ling Lee , Min-Hsuan Tsai , Chiu-Te Lee , Chih-Chung Wang
- Applicant: United Microelectronics Corp.
- Applicant Address: TW Hsinchu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Priority: CN201810123483 20180207
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/06 ; H01L29/78 ; H01L29/08

Abstract:
A transistor structure including a substrate, a transistor device, a split buried layer, and a second buried layer is provided. The substrate has a device region. The transistor device is located in the device region. The split buried layer is located under the transistor device in the substrate and includes first buried layers separated from each other. The second buried layer is located under the split buried layer in the substrate and connects the first buried layers. The second buried layer and the split buried layer have a first conductive type. The transistor structure may have a higher breakdown voltage.
Public/Granted literature
- US20190245041A1 TRANSISTOR STRUCTURE Public/Granted day:2019-08-08
Information query
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