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公开(公告)号：US20220328685A1
公开(公告)日：2022-10-13
申请号：US17852371
申请日：2022-06-29
发明人： Tseng Hsun Liu , Min-Hsuan Tsai , Ke-Feng Lin , Ming-Yen Liu , Wen-Chung Chang , Cherng-En Sun
IPC分类号： H01L29/78 , H01L29/66 , H01L29/10 , H01L29/423
摘要： A method for fabricating a transistor includes providing a substrate, having a gate region and a first trench in the substate at a first side of the gate region; forming a first gate insulating layer, disposed on a first portion of the gate region, opposite to the first trench; forming a second gate insulating layer, disposed on a second portion of the gate region and a first portion of the first trench abutting to the gate region, wherein the second gate insulating layer is thicker than the first gate insulating layer; forming a gate layer, disposed on the first and second gate insulating layers, having a downward protruding portion corresponding to the first trench; forming a first doped region in the substrate at least under the first trench; and forming a second doped region in the substrate at a second side of the gate region.
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公开(公告)号：US09196723B1
公开(公告)日：2015-11-24
申请号：US14564050
申请日：2014-12-08
发明人： Kuan-Yu Chen , Tseng-Hsun Liu , Min-Hsuan Tsai , Te-Chang Chiu , Chiu-Ling Lee , Chiu-Te Lee
CPC分类号： H01L29/782 , H01L29/0619 , H01L29/0623 , H01L29/0638 , H01L29/0649 , H01L29/0653 , H01L29/0878 , H01L29/1079 , H01L29/45 , H01L29/665 , H01L29/7816 , H01L29/7817 , H01L29/7823 , H01L29/872
摘要： The present invention provides a semiconductor device structure which integrates a lateral diffused metal oxide semiconductor (LDMOS) with a Schottky diode, including: a substrate, having a first conductivity type, a gate positioned on the substrate, a drain region formed in the substrate, the drain region having a second conductivity type complementary to the first conductivity type, a source region formed in the substrate, the source region having the second conductivity type, a high-voltage well region formed in the substrate, the high-voltage well region having a first conductivity type; a Schottky diode disposed on the substrate and disposed beside the LDMOS, wherein the semiconductor device structure is an asymmetric structure, and a deep well region disposed in the substrate and having the second conductivity type, wherein the LDMOS and the Schottky diode are all formed within the deep well region.
摘要翻译： 本发明提供了一种将横向扩散金属氧化物半导体（LDMOS）与肖特基二极管集成的半导体器件结构，包括：具有第一导电类型的衬底，位于衬底上的栅极，形成在衬底中的漏极区， 所述漏极区域具有与所述第一导电类型互补的第二导电类型，形成在所述衬底中的源极区域，具有第二导电类型的源极区域，形成在所述衬底中的高压阱区域，所述高压阱区域具有 第一导电类型; 设置在衬底上并设置在LDMOS旁边的肖特基二极管，其中半导体器件结构是不对称结构，以及设置在衬底中并且具有第二导电类型的深阱区，其中LDMOS和肖特基二极管全部形成在 深井区域。
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公开(公告)号：US10431655B2
公开(公告)日：2019-10-01
申请号：US15924001
申请日：2018-03-16
发明人： Yen-Ming Chen , Chiu-Ling Lee , Min-Hsuan Tsai , Chiu-Te Lee , Chih-Chung Wang
摘要： A transistor structure including a substrate, a transistor device, a split buried layer, and a second buried layer is provided. The substrate has a device region. The transistor device is located in the device region. The split buried layer is located under the transistor device in the substrate and includes first buried layers separated from each other. The second buried layer is located under the split buried layer in the substrate and connects the first buried layers. The second buried layer and the split buried layer have a first conductive type. The transistor structure may have a higher breakdown voltage.
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公开(公告)号：US09214549B2
公开(公告)日：2015-12-15
申请号：US14504438
申请日：2014-10-02
发明人： Min-Hsuan Tsai
CPC分类号： H01L29/782 , H01L27/0629 , H01L29/0623 , H01L29/0638 , H01L29/0653 , H01L29/47 , H01L29/7839 , H01L29/872
摘要： A high voltage device having Schottky diode includes a semiconductor substrate, a Schottky diode formed on the semiconductor substrate, at least a first doped region having a first conductive type formed in the semiconductor substrate and under the Schottky diode, and a control gate positioned on the semiconductor substrate. The control gate covers a portion of the Schottky diode and the first doped region positioned on the semiconductor substrate.
摘要翻译： 具有肖特基二极管的高电压装置包括形成在半导体衬底上的半导体衬底，肖特基二极管，至少形成在半导体衬底中并在肖特基二极管下方的具有第一导电类型的第一掺杂区域，以及控制栅极， 半导体衬底。 控制栅极覆盖位于半导体衬底上的肖特基二极管和第一掺杂区的一部分。
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公开(公告)号：US11417761B1
公开(公告)日：2022-08-16
申请号：US17171760
申请日：2021-02-09
发明人： Tseng Hsun Liu , Min-Hsuan Tsai , Ke-Feng Lin , Ming-Yen Liu , Wen-Chung Chang , Cherng-En Sun
IPC分类号： H01L29/66 , H01L29/78 , H01L29/10 , H01L29/423
摘要： A transistor structure includes a substrate, having a gate region and a first trench in the substate at a first side of the gate region. Further, a first gate insulating layer is disposed on a first portion of the gate region, opposite to the first trench. A second gate insulating layer is disposed on a second portion of the gate region and a first portion of the first trench abutting to the gate region, wherein the second gate insulating layer is thicker than the first gate insulating layer. A gate layer is disposed on the first and second gate insulating layers, having a downward protruding portion corresponding to the first trench. A first doped region is in the substrate at least under the first trench. A second doped region is in the substrate at a second side of the gate region.
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公开(公告)号：US20220254924A1
公开(公告)日：2022-08-11
申请号：US17171760
申请日：2021-02-09
发明人： Tseng Hsun Liu , Min-Hsuan Tsai , Ke-Feng Lin , Ming-Yen Liu , Wen-Chung Chang , Cherng-En Sun
IPC分类号： H01L29/78 , H01L29/423 , H01L29/10 , H01L29/66
摘要： A transistor structure includes a substrate, having a gate region and a first trench in the substrate at a first side of the gate region. Further, a first gate insulating layer is disposed on a first portion of the gate region, opposite to the first trench. A second gate insulating layer is disposed on a second portion of the gate region and a first portion of the first trench abutting to the gate region, wherein the second gate insulating layer is thicker than the first gate insulating layer. A gate layer is disposed on the first and second gate insulating layers, having a downward protruding portion corresponding to the first trench. A first doped region is in the substrate at least under the first trench. A second doped region is in the substrate at a second side of the gate region.
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公开(公告)号：US20190245041A1
公开(公告)日：2019-08-08
申请号：US15924001
申请日：2018-03-16
发明人： Yen-Ming Chen , Chiu-Ling Lee , Min-Hsuan Tsai , Chiu-Te Lee , Chih-Chung Wang
CPC分类号： H01L29/1079 , H01L29/0649 , H01L29/0865 , H01L29/0882 , H01L29/1095 , H01L29/7816 , H01L29/7835
摘要： A transistor structure including a substrate, a transistor device, a split buried layer, and a second buried layer is provided. The substrate has a device region. The transistor device is located in the device region. The split buried layer is located under the transistor device in the substrate and includes first buried layers separated from each other. The second buried layer is located under the split buried layer in the substrate and connects the first buried layers. The second buried layer and the split buried layer have a first conductive type. The transistor structure may have a higher breakdown voltage.
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公开(公告)号：US20150054116A1
公开(公告)日：2015-02-26
申请号：US14504438
申请日：2014-10-02
发明人： Min-Hsuan Tsai
IPC分类号： H01L29/78 , H01L29/06 , H01L29/47 , H01L27/06 , H01L29/872
CPC分类号： H01L29/782 , H01L27/0629 , H01L29/0623 , H01L29/0638 , H01L29/0653 , H01L29/47 , H01L29/7839 , H01L29/872
摘要： A high voltage device having Schottky diode includes a semiconductor substrate, a Schottky diode formed on the semiconductor substrate, at least a first doped region having a first conductive type formed in the semiconductor substrate and under the Schottky diode, and a control gate positioned on the semiconductor substrate. The control gate covers a portion of the Schottky diode and the first doped region positioned on the semiconductor substrate.
摘要翻译： 具有肖特基二极管的高电压装置包括形成在半导体衬底上的半导体衬底，肖特基二极管，至少形成在半导体衬底中并在肖特基二极管下方的具有第一导电类型的第一掺杂区域，以及控制栅极， 半导体衬底。 控制栅极覆盖位于半导体衬底上的肖特基二极管和第一掺杂区的一部分。
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