Invention Grant
- Patent Title: Multi-criteria power management scheme for pooled accelerator architectures
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Application No.: US15718451Application Date: 2017-09-28
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Publication No.: US10444813B2Publication Date: 2019-10-15
- Inventor: Rasika Subramanian , Francesc Guim Bernat , Steen Larsen
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F1/3206 ; G06F1/3287 ; G06F1/3209

Abstract:
A computing device, a method and a system to control power. The computing device is configured to be used as part of a network fabric including a plurality of nodes and a plurality of pooled accelerators coupled to the nodes. The computing device includes: a memory storing instructions; and processing circuitry configured to perform the instructions. The processing circuitry is to receive respective requests from respective ones of the plurality of nodes, the requests addressed to a plurality of corresponding accelerators, each of the respective requests including information on a kernel to be executed by a corresponding accelerator, on the corresponding accelerator, and on a performance target for execution of the kernel. The processing circuitry is further to, based on the information in said each of the respective requests, control a power supply to the corresponding accelerator.
Public/Granted literature
- US20190094926A1 MULTI-CRITERIA POWER MANAGEMENT SCHEME FOR POOLED ACCELERATOR ARCHITECTURES Public/Granted day:2019-03-28
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