Invention Grant
- Patent Title: High density interconnect device and method
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Application No.: US15438321Application Date: 2017-02-21
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Publication No.: US10446499B2Publication Date: 2019-10-15
- Inventor: Mihir K Roy , Mathew J Manusharow
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L23/13
- IPC: H01L23/13 ; H01L21/48 ; H01L23/14 ; H01L23/538 ; H01L23/00 ; H01L25/00 ; H01L25/065 ; H01L25/18

Abstract:
Embodiments that allow both high density and low density interconnection between microelectronic die and motherboard via Direct Chip Attach (DCA) are described. In some embodiments, microelectronic die have a high density interconnect with a small bump pitch located along one edge and a lower density connection region with a larger bump pitch located in other regions of the die. The high density interconnect regions between die are interconnected using an interconnecting bridge made out of a material that can support high density interconnect manufactured into it, such as silicon. The lower density connection regions are used to attach interconnected die directly to a board using DCA. The high density interconnect can utilize current Controlled Collapsed Chip Connection (C4) spacing when interconnecting die with an interconnecting bridge, while allowing much larger spacing on circuit boards.
Public/Granted literature
- US20170162509A1 HIGH DENSITY INTERCONNECT DEVICE AND METHOD Public/Granted day:2017-06-08
Information query
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