Invention Grant
- Patent Title: Three-dimensional memory devices, and related methods and electronic systems
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Application No.: US16183392Application Date: 2018-11-07
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Publication No.: US10446579B2Publication Date: 2019-10-15
- Inventor: Roger W. Lindsay , Michael A. Smith , Brett D. Lowe
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L21/768 ; H01L21/033 ; H01L21/027 ; H01L21/311 ; H01L23/528 ; H01L23/522 ; H01L27/11556 ; H01L27/11575 ; H01L27/11524 ; H01L27/11565 ; H01L27/1157 ; H01L27/11573

Abstract:
A method of forming a semiconductor device structure comprises forming a stack structure comprising stacked tiers. Each of the stacked tiers comprises a first structure comprising a first material and a second structure comprising a second, different material longitudinally adjacent the first structure. A patterned hard mask structure is formed over the stack structure. Dielectric structures are formed within openings in the patterned hard mask structure. A photoresist structure is formed over the dielectric structures and the patterned hard mask structure. The photoresist structure, the dielectric structures, and the stack structure are subjected to a series of material removal processes to form apertures extending to different depths within the stack structure. Dielectric structures are formed over side surfaces of the stack structure within the apertures. Conductive contact structures are formed to longitudinally extend to bottoms of the apertures. Semiconductor device structures, semiconductor devices, and electronic systems are also described.
Public/Granted literature
- US20190096906A1 THREE-DIMENSIONAL MEMORY DEVICES, AND RELATED METHODS AND ELECTRONIC SYSTEMS Public/Granted day:2019-03-28
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