Invention Grant
- Patent Title: Minimum/maximum and bitwise and/or based coarse stencil test
-
Application No.: US15260570Application Date: 2016-09-09
-
Publication No.: US10453170B2Publication Date: 2019-10-22
- Inventor: Robert M. Toth , Carl J. Munkberg , Jon N. Hasselgren
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Spectrum IP Law Group LLC
- Main IPC: G06T1/60
- IPC: G06T1/60 ; G06T1/20 ; G06T15/00

Abstract:
Methods and apparatus relating to techniques for provision of minimum or maximum and bitwise logic AND or logic OR based coarse stencil tests are described. In an embodiment, metadata (corresponding to a plurality of pixels) is stored in memory. One or more operations are performed on the metadata to generate a stencil result. The one or more operations comprise a bitwise intersection operation or a bitwise union operation and/or a minimum operation or maximum operation. Other embodiments are also disclosed and claimed.
Public/Granted literature
- US20180075573A1 MINIMUM/MAXIMUM AND BITWISE AND/OR BASED COARSE STENCIL TEST Public/Granted day:2018-03-15
Information query