Invention Grant
- Patent Title: Read training a memory controller
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Application No.: US15294671Application Date: 2016-10-14
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Publication No.: US10482041B2Publication Date: 2019-11-19
- Inventor: Tonia G. Morris , Jonathan C. Jasper , Arnaud J. Forestier
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Konrad Raynes Davda & Victor LLP
- Agent David W. Victor
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F13/38 ; G06F13/16 ; G06F13/42 ; G06F13/40 ; G11C11/4093 ; G11C11/4096

Abstract:
Provided are a device and computer readable storage medium for programming a memory module to initiate a training mode in which the memory module transmits continuous bit patterns on a side band lane of the bus interface; receiving the bit patterns over the bus interface; determining from the received bit patterns a transition of values in the bit pattern to determine a data eye between the determined transitions of the values; and determining a setting to control a phase interpolator to generate interpolated signals used to sample data within the determined data eye.
Public/Granted literature
- US20170031846A1 READ TRAINING A MEMORY CONTROLLER Public/Granted day:2017-02-02
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