Invention Grant
- Patent Title: Routing-over-void-T-line-compensation
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Application No.: US16021292Application Date: 2018-06-28
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Publication No.: US10484231B2Publication Date: 2019-11-19
- Inventor: Khang Choong Yong , Bok Eng Cheah , Jackson Chung Peng Kong , Stephen Harvey Hall , Yun Rou Lim
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Priority: MY2017702410 20170630
- Main IPC: H04L29/10
- IPC: H04L29/10 ; H05K1/02 ; H01R13/66

Abstract:
Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion.
Public/Granted literature
- US20190007259A1 ROUTING-OVER-VOID T-LINE COMPENSATION Public/Granted day:2019-01-03
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