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公开(公告)号：US10354957B2
公开(公告)日：2019-07-16
申请号：US15778379
申请日：2015-11-25
申请人： Intel Corporation
发明人： Bok Eng Cheah , Jackson Chung Peng Kong , Stephen Harvey Hall , Khang Choong Yong , Kooi Chi Ooi , Eric C Gantner
IPC分类号： H01L23/495 , H01L23/538 , H05K1/02 , H01L21/56 , H01L23/66 , H01L25/065 , H01L25/18 , H01L25/00 , H05K1/18
摘要： An electrical interconnect for an electronic package. The electrical interconnect includes a first dielectric layer; a second dielectric layer; a signal conductor positioned between the first dielectric layer and the second dielectric layer; and a conductive reference layer mounted on the first dielectric layer, and wherein the conductive reference layer does not cover the signal conductor. The conductive reference layer may be a first conductive reference layer and the electrical interconnect further comprises a second conductive reference layer mounted on the second dielectric layer. The second conductive reference layer does not cover the signal conductor. In addition, the signal conductor may be a first signal conductor and the electrical interconnect may further include a second signal conductor between the first dielectric layer and the second dielectric layer. The first and second signal conductors may form a differential pair of conductors.
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公开(公告)号：US11277903B2
公开(公告)日：2022-03-15
申请号：US16368221
申请日：2019-03-28
申请人： Intel Corporation
IPC分类号： H05K3/02 , H05K1/02 , G05B19/4097 , H05K1/18
摘要： Apparatuses and methods are provided for mitigating radio frequency interference and electromagnetic compatibility issues caused by the resonance of metal planes of a circuit board. A method for controlling impedance at an edge of a circuit board includes creating a cut at an edge of a plane of the circuit board. The cut extends from the edge of the plane to a point at a depth into the plane. The method can further include creating a cut pattern in the edge of the plane by repeating the cut along the edge of the plane such that an impedance of the plane at the depth is different, or lower, than an impedance of the plane at the edge of the plane. Other aspects are described.
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公开(公告)号：US20190008029A1
公开(公告)日：2019-01-03
申请号：US16021618
申请日：2018-06-28
申请人： Intel Corporation
发明人： Khang Choong Yong , Bok Eng Cheah , Jackson Chung Peng Kong , Stephen Harvey Hall , Yun Rou Lim
IPC分类号： H05K1/02 , H01L23/498 , H01L23/64
摘要： Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the conductor can include a first part routed over a major surface of a first side of the reference plane structure and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of a second side of the reference plane structure and that approaches a second edge of the reference plane structure with a second trajectory in-line with the first trajectory, and a third portion connecting the first portion with the second portion and having a third trajectory departing from the first trajectory and the second trajectory, the third portion configured to span the void.
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公开(公告)号：US20240329715A1
公开(公告)日：2024-10-03
申请号：US18129138
申请日：2023-03-31
申请人： Intel Corporation
发明人： Amit K. Jain , Howard L. Heck , Marva Mason Ortiz , Stephen Harvey Hall , Eskinder Hailu , Chin Lee Kuan , Sameer Shekhar
IPC分类号： G06F1/3215 , G06F1/324
CPC分类号： G06F1/3215 , G06F1/324
摘要： An apparatus, system, and method for improved power consumption and/or noise reduction in a differential input/output (I/O) buffer are provided. A circuit can include a differential signal buffer and encoding scheme quantifying and selection circuitry. The encoding scheme quantifying and selection circuitry can be configured to generate a selection code indicating a selected encoding scheme of the encoding schemes based on respective signals indicating whether each respective encoding scheme of encoding schemes has a net positive power consumption reduction in differential signals. The encoding scheme quantifying and selection circuitry can be configured to provide the selection code to an encoder.
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公开(公告)号：US10856407B2
公开(公告)日：2020-12-01
申请号：US16021618
申请日：2018-06-28
申请人： Intel Corporation
发明人： Khang Choong Yong , Bok Eng Cheah , Jackson Chung Peng Kong , Stephen Harvey Hall , Yun Rou Lim
摘要： Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the conductor can include a first part routed over a major surface of a first side of the reference plane structure and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of a second side of the reference plane structure and that approaches a second edge of the reference plane structure with a second trajectory in-line with the first trajectory, and a third portion connecting the first portion with the second portion and having a third trajectory departing from the first trajectory and the second trajectory, the third portion configured to span the void.
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公开(公告)号：US11729900B2
公开(公告)日：2023-08-15
申请号：US17694201
申请日：2022-03-14
申请人： Intel Corporation
IPC分类号： H05K1/02 , G05B19/4097 , H05K3/02 , H05K1/18
CPC分类号： H05K1/0225 , G05B19/4097 , H05K3/027 , G05B2219/45026 , G05B2219/45034 , H05K1/18 , H05K2201/093 , H05K2201/098 , H05K2201/09027 , H05K2201/10098
摘要： Apparatuses and methods are provided for mitigating radio frequency interference and electromagnetic compatibility issues caused by the resonance of metal planes of a circuit board. A method for controlling impedance at an edge of a circuit board includes creating a cut at an edge of a plane of the circuit board. The cut extends from the edge of the plane to a point at a depth into the plane. The method can further include creating a cut pattern in the edge of the plane by repeating the cut along the edge of the plane such that an impedance of the plane at the depth is different, or lower, than an impedance of the plane at the edge of the plane. Other aspects are described.
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公开(公告)号：US10484231B2
公开(公告)日：2019-11-19
申请号：US16021292
申请日：2018-06-28
申请人： Intel Corporation
发明人： Khang Choong Yong , Bok Eng Cheah , Jackson Chung Peng Kong , Stephen Harvey Hall , Yun Rou Lim
摘要： Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion.
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公开(公告)号：US20190214336A1
公开(公告)日：2019-07-11
申请号：US16326544
申请日：2016-09-30
申请人： Intel Corporation
IPC分类号： H01L23/498 , H01L23/66 , H01L21/48
CPC分类号： H01L23/49822 , H01L21/4857 , H01L23/498 , H01L23/49811 , H01L23/49866 , H01L23/66
摘要： A self-equalizing interconnect in a connector is installed in a microelectronic device. The self-equalizing interconnect is formed of a plurality of electrically conductive layers under conditions to offset skin-effect losses with respect to frequency change during operation. Each successive layer is configured to with the next highest electrical conductivity and subsequent electrically conductive films gradually decrease in electrical conductivity. In an embodiment, thickness of the conductive film adjacent the reference plain is configured thinnest and subsequent films are added and are seriatim gradually thicker. The highest electrically conductive film is configured closest to a reference plane in the connector, and the lowest electrically conductive film is farthest from the reference plane.
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公开(公告)号：US20190007259A1
公开(公告)日：2019-01-03
申请号：US16021292
申请日：2018-06-28
申请人： Intel Corporation
发明人： Khang Choong Yong , Bok Eng Cheah , Jackson Chung Peng Kong , Stephen Harvey Hall , Yun Rou Lim
CPC分类号： H04L29/10 , H01R13/6658 , H01R13/6691 , H05K1/025 , H05K1/0251 , H05K2201/09345 , H05K2201/09727
摘要： Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion.
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公开(公告)号：US20220304143A1
公开(公告)日：2022-09-22
申请号：US17694201
申请日：2022-03-14
申请人： Intel Corporation
IPC分类号： H05K1/02 , G05B19/4097 , H05K3/02
摘要： Apparatuses and methods are provided for mitigating radio frequency interference and electromagnetic compatibility issues caused by the resonance of metal planes of a circuit board. A method for controlling impedance at an edge of a circuit board includes creating a cut at an edge of a plane of the circuit board. The cut extends from the edge of the plane to a point at a depth into the plane. The method can further include creating a cut pattern in the edge of the plane by repeating the cut along the edge of the plane such that an impedance of the plane at the depth is different, or lower, than an impedance of the plane at the edge of the plane. Other aspects are described.
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