Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16175522Application Date: 2018-10-30
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Publication No.: US10541216B2Publication Date: 2020-01-21
- Inventor: Kazuyuki Nakagawa , Keita Tsuchiya , Yoshiaki Sato , Shuuichi Kariyazaki , Norio Chujo , Masayoshi Yagyu , Yutaka Uematsu
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2017-245158 20171221
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H01L23/66 ; H01L23/538 ; H01L23/367 ; H01L23/00

Abstract:
A semiconductor device includes a semiconductor chip mounted over a wiring substrate. A signal wiring for input for transmitting input signals to the semiconductor chip and a signal wiring for output for transmitting output signals from the semiconductor chip are placed in different wiring layers in the wiring substrate and overlap with each other. In the direction of thickness of the wiring substrate, each of the signal wirings is sandwiched between conductor planes supplied with reference potential. In the front surface of the semiconductor chip, a signal electrode for input and a signal electrode for output are disposed in different rows. In cases where the signal wiring for output is located in a layer higher than the signal wiring for input in the wiring substrate, the signal electrode for output is placed in a row closer to the outer edge of the front surface than the signal electrode for input.
Public/Granted literature
- US20190198462A1 SEMICONDUCTOR DEVICE Public/Granted day:2019-06-27
Information query
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