Invention Grant
- Patent Title: Memory arrays and methods of fabricating integrated structure
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Application No.: US16413498Application Date: 2019-05-15
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Publication No.: US10553611B2Publication Date: 2020-02-04
- Inventor: John M. Meldrim , Yushi Hu , Rita J. Klein , John D. Hopkins , Hongbin Zhu , Gordon A. Haller , Luan C. Tran
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L27/11582 ; H01L27/11524 ; H01L27/1157 ; H01L21/28 ; H01L29/49

Abstract:
Some embodiments include a memory array which has a stack of alternating first and second levels. Channel material pillars extend through the stack, and vertically-stacked memory cell strings are along the channel material pillars. A common source is under the stack and electrically coupled to the channel material pillars. The common source has conductive protective material over and directly against metal silicide, with the conductive protective material being a composition other than metal silicide. Some embodiments include methods of fabricating integrated structures.
Public/Granted literature
- US20190280007A1 Memory Arrays and Methods of Fabricating Integrated Structures Public/Granted day:2019-09-12
Information query
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