Invention Grant
- Patent Title: Methods of manufacturing integrated circuit devices having a fin-type active region
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Application No.: US15697720Application Date: 2017-09-07
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Publication No.: US10593670B2Publication Date: 2020-03-17
- Inventor: Jae-yeol Song , Wan-don Kim , Oh-seong Kwon , Hyeok-jun Son , Sang-jin Hyun , Hoon-joo Na
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2015-0057536 20150423
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/06 ; H01L21/8234 ; H01L21/28 ; H01L29/49 ; H01L29/51 ; H01L29/66

Abstract:
Integrated circuit devices include a substrate including first and second fin-type active regions and first and second gate structures. The first gate structure includes first gate insulating layer on the first fin-type active region to cover upper surface and both side surfaces of the first fin-type active region, first gate electrode on the first gate insulating layer and has first thickness in first direction perpendicular to upper surface of the substrate, and second gate electrode on the first gate electrode. The second gate structure includes second gate insulating layer on the second fin-type active region to cover upper surface and both side surfaces of the second fin-type active region, third gate insulating layer on the second gate insulating layer, third gate electrode on the third gate insulating layer and has second thickness different from the first thickness in the first direction, and fourth gate electrode on the third gate electrode.
Public/Granted literature
- US20180012889A1 Methods of Manufacturing Integrated Circuit Devices Having a FIN-Type Active Region Public/Granted day:2018-01-11
Information query
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