Abstract:
Integrated circuit devices include a substrate including first and second fin-type active regions and first and second gate structures. The first gate structure includes first gate insulating layer on the first fin-type active region to cover upper surface and both side surfaces of the first fin-type active region, first gate electrode on the first gate insulating layer and has first thickness in first direction perpendicular to upper surface of the substrate, and second gate electrode on the first gate electrode. The second gate structure includes second gate insulating layer on the second fin-type active region to cover upper surface and both side surfaces of the second fin-type active region, third gate insulating layer on the second gate insulating layer, third gate electrode on the third gate insulating layer and has second thickness different from the first thickness in the first direction, and fourth gate electrode on the third gate electrode.
Abstract:
Provided is a memory mapping method, and particularly provided is a nonvolatile main memory mapping method for managing a nonvolatile main memory. The nonvolatile memory mapping method includes: performing a system call in order to access a file page that is required to operate a process stored in a kernel area of a nonvolatile main memory, wherein both the file page and process are stored in the kernel area of the nonvolatile main memory; and mapping a physical address of the file page to a virtual address of a user area of the nonvolatile main memory.
Abstract:
Integrated circuit devices include a substrate including first and second fin-type active regions and first and second gate structures. The first gate structure includes first gate insulating layer on the first fin-type active region to cover upper surface and both side surfaces of the first fin-type active region, first gate electrode on the first gate insulating layer and has first thickness in first direction perpendicular to upper surface of the substrate, and second gate electrode on the first gate electrode. The second gate structure includes second gate insulating layer on the second fin-type active region to cover upper surface and both side surfaces of the second fin-type active region, third gate insulating layer on the second gate insulating layer, third gate electrode on the third gate insulating layer and has second thickness different from the first thickness in the first direction, and fourth gate electrode on the third gate electrode.
Abstract:
Integrated circuit devices include a substrate including first and second fin-type active regions and first and second gate structures. The first gate structure includes first gate insulating layer on the first fin-type active region to cover upper surface and both side surfaces of the first fin-type active region, first gate electrode on the first gate insulating layer and has first thickness in first direction perpendicular to upper surface of the substrate, and second gate electrode on the first gate electrode. The second gate structure includes second gate insulating layer on the second fin-type active region to cover upper surface and both side surfaces of the second fin-type active region, third gate insulating layer on the second gate insulating layer, third gate electrode on the third gate insulating layer and has second thickness different from the first thickness in the first direction, and fourth gate electrode on the third gate electrode.
Abstract:
Provided is a memory mapping method, and particularly provided is a nonvolatile main memory mapping method for managing a nonvolatile main memory. The nonvolatile memory mapping method includes: performing a system call in order to access a file page that is required to operate a process stored in a kernel area of a nonvolatile main memory, wherein both the file page and process are stored in the kernel area of the nonvolatile main memory; and mapping a physical address of the file page to a virtual address of a user area of the nonvolatile main memory.