Invention Grant
- Patent Title: Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings
-
Application No.: US16185921Application Date: 2018-11-09
-
Publication No.: US10666256B2Publication Date: 2020-05-26
- Inventor: James Plusquellic , James Aarestad
- Applicant: STC.UNM
- Applicant Address: US NM Albuquerque
- Assignee: STC.UNM
- Current Assignee: STC.UNM
- Current Assignee Address: US NM Albuquerque
- Agency: Valauskas Corder LLC
- Main IPC: H03K19/003
- IPC: H03K19/003 ; H03K19/21 ; H03K3/84 ; H03K23/00 ; H04L9/06 ; H04L9/08
Abstract:
A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.
Public/Granted literature
Information query
