SYSTEMS AND METHODS FOR LEVERAGING PATH DELAY VARIATIONS IN A CIRCUIT AND GENERATING ERROR-TOLERANT BITSTRINGS
    5.
    发明申请
    SYSTEMS AND METHODS FOR LEVERAGING PATH DELAY VARIATIONS IN A CIRCUIT AND GENERATING ERROR-TOLERANT BITSTRINGS 审中-公开
    用于在电路中引导路径延迟变化的系统和方法,并生成容错位

    公开(公告)号:US20160204781A1

    公开(公告)日:2016-07-14

    申请号:US14913454

    申请日:2014-08-28

    Applicant: STC.UNM

    Abstract: A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

    Abstract translation: 硬件嵌入延迟PUF(HELP)通过监视路径稳定性和测量核心逻辑宏的路径延迟来利用熵。 帮助包含处理偏见的技术。 HELP的一个独特之处在于可以比较不同测试结构测量的数据。 HELP可以在现有的FPGA平台上实现。 帮助可以利用路径稳定性和模内变化作为熵的来源。

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