Invention Grant
- Patent Title: Thickness compensation by modulation of number of deposition cycles as a function of chamber accumulation for wafer to wafer film thickness matching
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Application No.: US15785093Application Date: 2017-10-16
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Publication No.: US10697059B2Publication Date: 2020-06-30
- Inventor: Richard Phillips , Chloe Baldasseroni , Nishanth Manjunath
- Applicant: Lam Research Corporation
- Applicant Address: US CA Fremont
- Assignee: Lam Research Corporation
- Current Assignee: Lam Research Corporation
- Current Assignee Address: US CA Fremont
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Main IPC: C23C16/455
- IPC: C23C16/455 ; C23C16/40 ; C23C16/34 ; C23C16/52 ; G06F17/11 ; H01L21/02 ; H01L21/66 ; H01L21/677

Abstract:
Methods and apparatuses for performing atomic layer deposition are provided. A method may include determining an amount of accumulated deposition material currently on an interior region of a deposition chamber interior, wherein the amount of accumulated deposition material changes over the course of processing a batch of substrates; applying the determined amount of accumulated deposition material to a relationship between a number of ALD cycles required to achieve a target deposition thickness, and a variable representing an amount of accumulated deposition material, wherein the applying returns a compensated number of ALD cycles for producing the target deposition thickness given the amount of accumulated deposition material currently on the interior region of the deposition chamber interior; and performing the compensated number of ALD cycles on one or more substrates in the batch.
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