Invention Grant
- Patent Title: Non-volatile static random access memory architecture having single non-volatile bit per volatile memory bit
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Application No.: US16043425Application Date: 2018-07-24
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Publication No.: US10706928B2Publication Date: 2020-07-07
- Inventor: Francois Tailliet , Marc Battista
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Crowe & Dunlevy
- Main IPC: G11C14/00
- IPC: G11C14/00 ; G11C8/10 ; G11C7/06 ; G11C11/419 ; G11C16/08 ; G11C16/04 ; G11C16/24

Abstract:
Disclosed herein is a method of operating a non-volatile static random access NVSRAM memory formed from words. Each word includes NVSRAM cells, each of those NVSRAM cells having an SRAM cell and an electronically erasable programmable read only memory EEPROM cell. If the SRAM cells of a word have been accessed since powerup, data is read from the NVSRAM cells of that word through the SRAM cells. However, if the SRAM cells of that word have not been written since powerup, data is read from the NVSRAM cells of that word through the EEPROM cells.
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