In embodiments, an apparatus may comprise random access memory (RAM); an error detecting and/or correcting code (EDCC) encoder to generate and add an error detecting and/or correcting code to a datum being written into the memory for storage; and an EDCC decoder to use the error detecting and/or correcting code added to the datum to correct one or more bits of error in the datum when the datum with the added error detecting and/or correcting code is read back from the RAM. Further, the apparatus may include an error detection and/or correction checker to inject one or more bits of error into the datum when the datum with the added error and/or correcting code is read back from the RAM, and check whether the EDCC decoder is able to correct the one or more bits of error injected into the datum.