- 专利标题： Castellated superjunction transistors
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申请号： US16252952申请日： 2019-01-21
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公开(公告)号： US10784341B2公开(公告)日： 2020-09-22
- 发明人: Josephine Bea Chang , Eric J. Stewart , Ken Alfred Nagamatsu , Robert S. Howell , Shalini Gupta
- 申请人： Josephine Bea Chang , Eric J. Stewart , Ken Alfred Nagamatsu , Robert S. Howell , Shalini Gupta
- 申请人地址： US VA Falls Church
- 专利权人： NORTHROP GRUMNIAN SYSTEMS CORPORATION
- 当前专利权人： NORTHROP GRUMNIAN SYSTEMS CORPORATION
- 当前专利权人地址： US VA Falls Church
- 代理机构： Tarolli, Sundheim, Covell & Tummino LLP
- 主分类号： H01L29/06
- IPC分类号： H01L29/06 ; H01L29/08 ; H01L23/29 ; H01L23/31 ; H01L29/15 ; H01L29/423 ; H01L21/02 ; H01L21/306 ; H01L29/778 ; H01L29/66
摘要：
A transistor is provided that comprises a source region overlying a base structure, a drain region overlying the base structure, and a block of semiconducting material overlying the base structure and being disposed between the source region and the drain region. The block of semiconducting material comprises a gate controlled region adjacent the source region, and a drain access region disposed between the gate controlled region and the drain region. The drain access region is formed of a plurality of semiconducting material ridges spaced apart from one another by non-channel trench openings, wherein at least a portion of the non-channel trench openings being filled with a doped material to provide a depletion region to improve breakdown voltage of the transistor.
公开/授权文献
- US20200235202A1 CASTELLATED SUPERJUNCTION TRANSISTORS 公开/授权日：2020-07-23
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