公开(公告)号：US10985243B2

公开(公告)日：2021-04-20

申请号：US16992244

申请日：2020-08-13

申请人： Josephine Bea Chang ,  Eric J. Stewart ,  Ken Alfred Nagamatsu ,  Robert S. Howell ,  Shalini Gupta

发明人： Josephine Bea Chang ,  Eric J. Stewart ,  Ken Alfred Nagamatsu ,  Robert S. Howell ,  Shalini Gupta

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L23/29 ,  H01L23/31 ,  H01L29/15 ,  H01L29/423 ,  H01L21/02 ,  H01L21/306 ,  H01L29/778 ,  H01L29/66

摘要： A transistor is provided that comprises a source region overlying a base structure, a drain region overlying the base structure, and a block of semiconducting material overlying the base structure and being disposed between the source region and the drain region. The block of semiconducting material comprises a gate controlled region adjacent the source region, and a drain access region disposed between the gate controlled region and the drain region. The drain access region is formed of a plurality of semiconducting material ridges spaced apart from one another by non-channel trench openings, wherein at least a portion of the non-channel trench openings being filled with a doped material to provide a depletion region to improve breakdown voltage of the transistor.

公开(公告)号：US10784341B2

公开(公告)日：2020-09-22

申请号：US16252952

申请日：2019-01-21

申请人： Josephine Bea Chang ,  Eric J. Stewart ,  Ken Alfred Nagamatsu ,  Robert S. Howell ,  Shalini Gupta

发明人： Josephine Bea Chang ,  Eric J. Stewart ,  Ken Alfred Nagamatsu ,  Robert S. Howell ,  Shalini Gupta

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L23/29 ,  H01L23/31 ,  H01L29/15 ,  H01L29/423 ,  H01L21/02 ,  H01L21/306 ,  H01L29/778 ,  H01L29/66

摘要： A transistor is provided that comprises a source region overlying a base structure, a drain region overlying the base structure, and a block of semiconducting material overlying the base structure and being disposed between the source region and the drain region. The block of semiconducting material comprises a gate controlled region adjacent the source region, and a drain access region disposed between the gate controlled region and the drain region. The drain access region is formed of a plurality of semiconducting material ridges spaced apart from one another by non-channel trench openings, wherein at least a portion of the non-channel trench openings being filled with a doped material to provide a depletion region to improve breakdown voltage of the transistor.

公开(公告)号：US10084075B2

公开(公告)日：2018-09-25

申请号：US15624445

申请日：2017-06-15

申请人： Bettina A. Nechay ,  Shalini Gupta ,  Matthew Russell King ,  Eric J. Stewart ,  Robert S. Howell ,  Justin Andrew Parke ,  Harlan Carl Cramer ,  Howell George Henry ,  Ronald G. Freitag ,  Karen Marie Renaldo

发明人： Bettina A. Nechay ,  Shalini Gupta ,  Matthew Russell King ,  Eric J. Stewart ,  Robert S. Howell ,  Justin Andrew Parke ,  Harlan Carl Cramer ,  Howell George Henry ,  Ronald G. Freitag ,  Karen Marie Renaldo

IPC分类号： H01L29/06 ,  H01L29/778 ,  H01L29/66 ,  H01L29/10 ,  H01L29/20 ,  H01L21/3065 ,  H01L29/205 ,  H01L29/15

CPC分类号： H01L29/7785 ,  H01L21/3065 ,  H01L29/0657 ,  H01L29/1029 ,  H01L29/1058 ,  H01L29/157 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783

摘要： A transistor device is provided that comprises a base structure, and a superlattice structure overlying the base structure and comprising a multichannel ridge having sloping sidewalls. The multichannel ridge comprises a plurality of heterostructures that each form a channel of the multichannel ridge, wherein a parameter of at least one of the heterostructures is varied relative to other heterostructures of the plurality of heterostructures. The transistor device further comprises a three-sided gate contact that wraps around and substantially surrounds the top and sides of the multichannel ridge along at least a portion of its depth.

公开(公告)号：US10854600B2

公开(公告)日：2020-12-01

申请号：US16577629

申请日：2019-09-20

申请人： Justin Andrew Parke ,  Eric J. Stewart ,  Robert S. Howell ,  Howell George Henry ,  Bettina Nechay ,  Harlan Carl Cramer ,  Matthew Russell King ,  Shalini Gupta ,  Ronald G. Freitag ,  Karen Marie Renaldo

发明人： Justin Andrew Parke ,  Eric J. Stewart ,  Robert S. Howell ,  Howell George Henry ,  Bettina Nechay ,  Harlan Carl Cramer ,  Matthew Russell King ,  Shalini Gupta ,  Ronald G. Freitag ,  Karen Marie Renaldo

IPC分类号： H01L21/338 ,  H01L27/088 ,  H01L21/8252 ,  H01L21/308 ,  H01L29/66 ,  H01L29/778 ,  H01L27/06 ,  H01L29/20 ,  H01L29/06

摘要： A method of forming an integrated circuit can include forming a heterostructure over a substrate structure, wherein the given substrate structure comprises a given semiconductor material. The method can include etching a castellated channel region in an e-mode device area of the heterostructure that defines a plurality of ridge channels interleaved between a plurality of trenches, the ridge channels comprising another semiconductor material. The method can also include forming an isolation region on the heterostructure to electrically isolate the e-mode device area from a d-mode device area of the heterostructure. The method can further include forming a mask with an opening that defines a castellated gate opening overlying the castellated channel region and the mask defines an opening overlaying a single planar gate overlying the d-mode device area of the heterostructure. The method can also include performing a contact fill with conductive material to form a castellated gate contact.

公开(公告)号：US10468406B2

公开(公告)日：2019-11-05

申请号：US14509750

申请日：2014-10-08

申请人： Justin Andrew Parke ,  Eric J. Stewart ,  Robert S. Howell ,  Howell George Henry ,  Bettina Nechay ,  Harlan Carl Cramer ,  Matthew Russell King ,  Shalini Gupta ,  Ronald G. Freitag ,  Karen Marie Renaldo

发明人： Justin Andrew Parke ,  Eric J. Stewart ,  Robert S. Howell ,  Howell George Henry ,  Bettina Nechay ,  Harlan Carl Cramer ,  Matthew Russell King ,  Shalini Gupta ,  Ronald G. Freitag ,  Karen Marie Renaldo

IPC分类号： H01L29/15 ,  H01L27/088 ,  H01L21/8252 ,  H01L21/308 ,  H01L29/66 ,  H01L29/778 ,  H01L27/06 ,  H01L29/20 ,  H01L29/06

摘要： A circuit is provided that includes a castellated channel device that comprises a heterostructure overlying a substrate structure, a castellated channel device area formed in the heterostructure that defines a plurality of ridge channels interleaved between a plurality of trenches, and a three-sided castellated conductive gate contact that extends across the castellated channel device area. The three-sided gate contact substantially surrounds each ridge channel around their tops and their sides to overlap a channel interface of heterostructure of each of the plurality of ridge channels. The three-sided castellated conductive gate contact extends along at least a portion of a length of each ridge channel.

公开(公告)号：US09419120B2

公开(公告)日：2016-08-16

申请号：US14533752

申请日：2014-11-05

申请人： Bettina A. Nechay ,  Shalini Gupta ,  Matthew Russell King ,  Eric J. Stewart ,  Robert S. Howell ,  Justin Andrew Parke ,  Harlan Carl Cramer ,  Howell George Henry ,  Ronald G. Freitag ,  Karen Marie Renaldo

发明人： Bettina A. Nechay ,  Shalini Gupta ,  Matthew Russell King ,  Eric J. Stewart ,  Robert S. Howell ,  Justin Andrew Parke ,  Harlan Carl Cramer ,  Howell George Henry ,  Ronald G. Freitag ,  Karen Marie Renaldo

IPC分类号： H01L29/06 ,  H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/0336 ,  H01L29/778 ,  H01L29/66 ,  H01L29/10

CPC分类号： H01L29/7785 ,  H01L21/3065 ,  H01L29/0657 ,  H01L29/1029 ,  H01L29/1058 ,  H01L29/157 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783

摘要： A transistor device is provided that comprises a base structure, and a superlattice structure overlying the base structure and comprising a multichannel ridge having sloping sidewalls. The multichannel ridge comprises a plurality of heterostructures that each form a channel of the multichannel ridge, wherein a parameter of at least one of the heterostructures is varied relative to other heterostructures of the plurality of heterostructures. The transistor device further comprises a three-sided gate contact that wraps around and substantially surrounds the top and sides of the multichannel ridge along at least a portion of its depth.

摘要翻译： 提供了一种晶体管器件，其包括基底结构和覆盖在基底结构上的超晶格结构，并且包括具有倾斜侧壁的多通道脊。 多通道脊包括多个异质结构，每个异质结构形成多通道脊的通道，其中至少一个异质结构的参数相对于多个异质结构中的其它异质结构而变化。 晶体管器件还包括三边形栅极接触，其沿着其深度的至少一部分包围并基本上围绕多通道脊的顶部和侧面。

公开(公告)号：US09711615B2

公开(公告)日：2017-07-18

申请号：US15222039

申请日：2016-07-28

申请人： Bettina A. Nechay ,  Shalini Gupta ,  Matthew Russell King ,  Eric J. Stewart ,  Robert S. Howell ,  Justin Andrew Parke ,  Harlan Carl Cramer ,  Howell George Henry ,  Ronald G. Freitag ,  Karen Marie Renaldo

发明人： Bettina A. Nechay ,  Shalini Gupta ,  Matthew Russell King ,  Eric J. Stewart ,  Robert S. Howell ,  Justin Andrew Parke ,  Harlan Carl Cramer ,  Howell George Henry ,  Ronald G. Freitag ,  Karen Marie Renaldo

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/778 ,  H01L29/10 ,  H01L21/3065 ,  H01L29/205 ,  H01L29/20

CPC分类号： H01L29/7785 ,  H01L21/3065 ,  H01L29/0657 ,  H01L29/1029 ,  H01L29/1058 ,  H01L29/157 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783

摘要： A transistor device is provided that comprises a base structure, and a superlattice structure overlying the base structure and comprising a multichannel ridge having sloping sidewalls. The multichannel ridge comprises a plurality of heterostructures that each form a channel of the multichannel ridge, wherein a parameter of at least one of the heterostructures is varied relative to other heterostructures of the plurality of heterostructures. The transistor device further comprises a three-sided gate contact that wraps around and substantially surrounds the top and sides of the multichannel ridge along at least a portion of its depth.

公开(公告)号：US20060248134A1

公开(公告)日：2006-11-02

申请号：US11260863

申请日：2005-10-27

申请人： Shalini Gupta ,  Sumanta Sarkar

发明人： Shalini Gupta ,  Sumanta Sarkar

IPC分类号： G06F7/00

CPC分类号： G06F5/015 ,  G06F7/762 ,  G06F7/768

摘要： An area efficient data shifter/rotator using a barrel shifter. The invention is a circuit, which uses a single barrel shifter and is controllable to implement either a left or right shift or rotation of bits of a digital data word. The circuit is dynamically controllable to implement left or right shift of bits of the digital data word (both logical and arithmetic) and rotation (to the left or right) of bits of the word. The proposed circuit produces the required output in a single cycle.

摘要翻译： 一种使用桶形移位器的区域高效数据移位器/旋转器。 本发明是一种电路，其使用单个桶形移位器并且可控制地实现数字数据字的位的左移或右移或旋转。 该电路是可动态控制的，以实现数字数据字（逻辑和运算）和字的位（左或右）的位的左移或右移。 所提出的电路在单个周期中产生所需的输出。

公开(公告)号：US20060211022A1

公开(公告)日：2006-09-21

申请号：US11361415

申请日：2006-02-23

申请人： Shuqian Jing ,  Francesca Civoli ,  Shalini Gupta ,  Daniel Halperin ,  Jason Pennucci ,  Steven Swanson ,  Yan Yu

发明人： Shuqian Jing ,  Francesca Civoli ,  Shalini Gupta ,  Daniel Halperin ,  Jason Pennucci ,  Steven Swanson ,  Yan Yu

IPC分类号： C12Q1/68 ,  G01N33/53

CPC分类号： G01N33/5008 ,  G01N33/5011 ,  G01N33/5023 ,  G01N33/5308 ,  G01N33/564 ,  G01N33/566 ,  G01N33/6854

摘要： The present invention relates to methods of detecting compounds that affect the activity of a therapeutic substance or composition administered to a subject, and to reagents for use in such methods.

摘要翻译： 本发明涉及检测影响施用于受试者的治疗物质或组合物的活性的化合物的方法以及用于这些方法的试剂。

公开(公告)号：US20070127787A1

公开(公告)日：2007-06-07

申请号：US11585402

申请日：2006-10-23

申请人： Kenneth Castleman ,  Qiang Wu ,  Samuel Cheng ,  Le Zou ,  Shalini Gupta

发明人： Kenneth Castleman ,  Qiang Wu ,  Samuel Cheng ,  Le Zou ,  Shalini Gupta

IPC分类号： G06K9/00

CPC分类号： G06K9/00248 ,  G06K9/00281

摘要： A facial recognition system that captures a plurality two-dimensional images of a target face, creates a three-dimensional facial model from the plurality of two-dimensional images of a target face, moves the three-dimensional facial model to a predetermined pose orientation to result in a normalized three-dimensional facial model, extracts measurements from the normalized three-dimensional facial model, and compares the extracted measurements to other facial measurements stored in a data base. Measurement extraction can be enhanced by modifying the data format of the normalized three-dimensional facial model into range and color image data.

摘要翻译： 一种面部识别系统，其捕获目标脸部的多个二维图像，从目标脸部的多个二维图像创建三维面部模型，将三维面部模型移动到预定的姿势取向， 导致归一化的三维面部模型，从归一化的三维面部模型中提取测量值，并将所提取的测量值与存储在数据库中的其他面部测量值进行比较。 通过将归一化三维面部模型的数据格式修改为范围和彩色图像数据，可以提高测量提取。