A wafer transport assembly includes a first wafer transport module and a second wafer transport module. A buffer module, arranged between the first wafer transport module and the second wafer transport module, includes a first buffer stack and a second buffer stack. Outer sides of the first wafer transport module are coupled to first and second process modules, respectively, and outer sides of the second wafer transport module are coupled to third and fourth process modules, respectively. The first wafer transport module, the second wafer transport module, and the buffer module define a continuous wafer transport volume providing a controlled environment within the wafer transport assembly.