Invention Grant
- Patent Title: Semiconductor device and method of forming a 3D integrated system-in-package module
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Application No.: US16821202Application Date: 2020-03-17
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Publication No.: US10790268B2Publication Date: 2020-09-29
- Inventor: DeokKyung Yang , HunTeak Lee , HeeSoo Lee
- Applicant: STATS ChipPAC Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Brian M. Kaufman; Robert D. Atkins
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L25/10 ; H01L25/00 ; H01L23/538 ; H01L21/48 ; H01L23/00 ; H01L21/56 ; H01L23/31

Abstract:
A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A conductive pillar is formed on the first substrate. A first encapsulant is deposited over the first substrate and semiconductor die after forming the conductive pillar. A groove is formed in the first encapsulant around the conductive pillar. A first passive device is disposed over a second substrate. A second encapsulant is deposited over the first passive device and second substrate. The first substrate is mounted over the second substrate. A shielding layer is formed over the second encapsulant. A second passive device can be mounted over the second substrate opposite the first passive device and outside a footprint of the first substrate.
Public/Granted literature
- US20200219859A1 Semiconductor Device and Method of Forming a 3D Integrated System-in-Package Module Public/Granted day:2020-07-09
Information query
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