Invention Grant
- Patent Title: Non-volatile memory elements with multiple access transistors
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Application No.: US16248279Application Date: 2019-01-15
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Publication No.: US10811069B2Publication Date: 2020-10-20
- Inventor: Harsh N. Patel , Bipul C. Paul
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Thompson Hine LLP
- Main IPC: G11C11/16
- IPC: G11C11/16 ; G11C13/00 ; H01L27/092 ; H01L27/22 ; H01L27/24 ; H01L23/528 ; H01L29/423 ; H01L21/8238 ; H01L43/02 ; H01F10/32

Abstract:
Structures for a non-volatile memory and methods for forming and using such structures. The structure includes a bitcell having a non-volatile memory element and a transmission gate. The transmission gate includes an n-type field-effect transistor and a p-type field effect transistor. The n-type field-effect transistor has a first drain region, a first source region, and a first gate electrode. The p-type field-effect transistor has a second drain region, a second source region coupled in parallel with the first source region, and a second gate electrode. The first drain region of the n-type field-effect transistor and the second drain region of the p-type field-effect transistor are coupled in parallel with the non-volatile memory element.
Public/Granted literature
- US20200227107A1 NON-VOLATILE MEMORY ELEMENTS WITH MULTIPLE ACCESS TRANSISTORS Public/Granted day:2020-07-16
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