Invention Grant
- Patent Title: Minimal aliasing bit-error correction code
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Application No.: US16236151Application Date: 2018-12-28
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Publication No.: US10860419B2Publication Date: 2020-12-08
- Inventor: Dinesh Somasekhar , Wei Wu , Shankar Ganesh Ramasubramanian , Vivek Kozhikkottu , Melin Dadual
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Fletcher Yoder, P.C.
- Main IPC: G06F11/10
- IPC: G06F11/10 ; H03M13/29 ; G11C29/52
Abstract:
Systems and methods related to data encoders that can perform error detection or correction. The encoders and decoders may minimize the addition of errors due to aliasing in error correction codes by implementing operators associated with reduced aliasing parity generating or reduced aliasing error checking matrices.
Public/Granted literature
- US20200210284A1 MINIMAL ALIASING BIT-ERROR CORRECTION CODE Public/Granted day:2020-07-02
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