Invention Grant
- Patent Title: Three-dimensional memory array including self-aligned dielectric pillar structures and methods of making the same
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Application No.: US16353048Application Date: 2019-03-14
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Publication No.: US10861871B2Publication Date: 2020-12-08
- Inventor: Akihiro Tobioka
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L21/461
- IPC: H01L21/461 ; H01L27/11582 ; H01L27/11565 ; H01L27/1157 ; H01L27/11573 ; H01L21/311 ; H01L21/033 ; H01L23/48 ; H01L23/522 ; H01L23/528 ; H01L23/532 ; H01L27/11526 ; H01L27/11519 ; H01L27/11524 ; H01L27/11556

Abstract:
An alternating stack of insulating layers and spacer material layers is formed over a substrate. Memory stack structures are formed through the alternating stack. A pair of backside trenches and a set of nested trenches are simultaneously formed through the alternating stack. Each trench within the set of nested trenches is spaced from any other trench within the set of nested trenches by at least one patterned remaining portion of the alternating stack having a respective shape of an enclosing wall. The at least one patterned remaining portion of the alternating stack is removed from inside to outside using sequential etch processes. A dielectric pillar structure is formed within the pillar-shaped cavity. The sacrificial material layers are replaced with electrically conductive layers. A through-memory-level conductive via structure is formed through the dielectric pillar structure.
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