Invention Grant
- Patent Title: Multi-level spin logic
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Application No.: US15779074Application Date: 2016-12-23
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Publication No.: US10944399B2Publication Date: 2021-03-09
- Inventor: Sasikanth Manipatruni , Ian A. Young , Dmitri E. Nikonov , Uygar E. Avci , Patrick Morrow , Anurag Chaudhry
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- International Application: PCT/US2016/068596 WO 20161223
- International Announcement: WO2017/112959 WO 20170629
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H01L43/04 ; H01L43/06 ; H01L43/10 ; H03K19/18

Abstract:
Described is an apparatus which comprises: a 4-state input magnet; a first spin channel region adjacent to the 4-state input magnet; a 4-state output magnet; a second spin channel region adjacent to the 4-state input and output magnets; and a third spin channel region adjacent to the 4-state output magnet. Described in an apparatus which comprises: a 4-state input magnet; a first filter layer adjacent to the 4-state input magnet; a first spin channel region adjacent to the first filter layer; a 4-state output magnet; a second filter layer adjacent to the 4-state output magnet; a second spin channel region adjacent to the first and second filter layers; and a third spin channel region adjacent to the second filter layer.
Public/Granted literature
- US20190386661A1 MULTI-LEVEL SPIN LOGIC Public/Granted day:2019-12-19
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