A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.