公开(公告)号：US12265322B2

公开(公告)日：2025-04-01

申请号：US18365757

申请日：2023-08-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ping-Hsun Lin ,  Pei-Cheng Hsu ,  Ching-Fang Yu ,  Ta-Cheng Lien ,  Chia-Jen Chen ,  Hsin-Chang Lee

IPC: G03F1/24

Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a capping layer on the reflective multilayer stack is provided. The reflective multilayer stack is treated prior to formation of the capping layer on the reflective multilayer stack. The capping layer is formed by an ion-assisted ion beam deposition or an ion-assisted sputtering process.

公开(公告)号：US12044959B2

公开(公告)日：2024-07-23

申请号：US18114848

申请日：2023-02-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hung-Yi Tsai ,  Wei-Che Hsieh ,  Ta-Cheng Lien ,  Hsin-Chang Lee ,  Ping-Hsun Lin ,  Hao-Ping Cheng ,  Ming-Wei Chen ,  Szu-Ping Tsai

IPC: G03F1/24

CPC classification number: G03F1/24

Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes a base material made of one or more of a Cr based material, an Ir based material, a Pt based material, or Co based material, and further contains one or more additional elements selected from the group consisting of Si, B, Ge, Al, As, Sb, Te, Se and Bi.

公开(公告)号：US20230280645A1

公开(公告)日：2023-09-07

申请号：US18317368

申请日：2023-05-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Chun-Fu Yang ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F7/20 ,  G03F1/70

CPC classification number: G03F1/24 ,  G03F1/70 ,  G03F7/2004

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

公开(公告)号：US11506969B2

公开(公告)日：2022-11-22

申请号：US17109833

申请日：2020-12-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Hsin-Chang Lee

IPC: G03F1/24

Abstract: A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The intermediate layer includes a material having a lower hydrogen diffusivity than a material of the capping layer.

公开(公告)号：US11294292B2

公开(公告)日：2022-04-05

申请号：US17085206

申请日：2020-10-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chen-Yang Lin ,  Da-Wei Yu ,  Li-Hsin Wang ,  Kuan-Wen Lin ,  Chia-Jen Chen ,  Hsin-Chang Lee

IPC: G03F7/20 ,  G03F1/82 ,  G03F1/22

Abstract: An photolithographic apparatus includes a particle removing cassette selectively extendable from the processing apparatus. The particle removing cassette includes a wind blade slit and an exhausting slit. The wind blade slit is configured to direct pressurized cleaning material to a surface of the mask to remove the debris particles from the surface of the mask. The exhausting slit collects the debris particles separated from the surface of the mask and contaminants through the exhaust line. In some embodiments, the wind blade slit includes an array of wind blade nozzles spaced apart within the wind blade slit. In some embodiments, the exhausting slit includes array of exhaust lines spaced apart within the exhausting slit.

公开(公告)号：US11237477B2

公开(公告)日：2022-02-01

申请号：US16012253

申请日：2018-06-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Tzu Yi Wang ,  Hsin-Chang Lee

IPC: G03F1/66 ,  G03F7/20 ,  H01L21/673

Abstract: A mask container for storing a mask for photolithography, includes a cover and a base having a plurality of tapered corners. The tapered corners taper outward and downward from a top major surface of the base. The cover having the tapered corners extends downward that covers the tapered corners of the base when the cover is attached to the base. The tapered corners of the cover are tapered at about the same angle as the tapered corners of the base so that a surface of the tapered corners of the cover is substantially parallel to a corresponding surface of the tapered corner of the base when the cover is attached to the base. A recess is located in the tapered corners of the cover. A biasing member and a ball-shaped member are located in the tapered corners of the base to mate with the recess when the cover is attached to the base.

公开(公告)号：US11137684B2

公开(公告)日：2021-10-05

申请号：US16719118

申请日：2019-12-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin ,  Hsin-Chang Lee ,  Chia-Jen Chen ,  Chih-Cheng Lin ,  Anthony Yen ,  Chin-Hsiang Lin

IPC: G03F7/20 ,  G03F1/50 ,  G03F1/24 ,  G03F1/26 ,  G03F1/42 ,  G03F1/48 ,  G03F1/54

Abstract: A method of performing a lithography process includes receiving a lithography mask and performing overlay measurement. The lithography mask includes a substrate that contains a low thermal expansion material (LTEM); a reflective structure over a first side of the substrate; an absorber layer over the reflective structure and containing one or more first overlay marks; and a conductive layer over a second side of the substrate and containing one or more second overlay marks. The second side is opposite the first side. The overlay measurement includes using the one or more first overlay marks in an extreme ultraviolet (EUV) lithography process or using the one or more second overlay marks in a non-EUV lithography process.

公开(公告)号：US11106126B2

公开(公告)日：2021-08-31

申请号：US16383535

申请日：2019-04-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsin-Chang Lee ,  Pei-Cheng Hsu ,  Ta-Cheng Lien ,  Tzu Yi Wang

IPC: G03F1/22 ,  G03F1/80 ,  H01J37/32

Abstract: In a method of manufacturing a photo mask, an etching mask layer having circuit patterns is formed over a target layer of the photo mask to be etched. The photo mask includes a backside conductive layer. The target layer is etched by plasma etching, while preventing active species of plasma from attacking the backside conductive layer.

公开(公告)号：US11086215B2

公开(公告)日：2021-08-10

申请号：US16019754

申请日：2018-06-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin ,  Hsin-Chang Lee

IPC: G03F1/58 ,  G03F1/24 ,  G03F1/38 ,  G03F7/20

Abstract: A reticle and a method for manufacturing a reticle are provided. The method includes forming a reflective multilayer (ML) over a front-side surface of a mask substrate. The method further includes forming a capping layer over the reflective ML. The method further includes forming a sacrificial multilayer over the capping layer. The method further includes forming an opening in the sacrificial multilayer to expose the capping layer. The method further includes forming a first absorption layer over the sacrificial multilayer and covering the capping layer in the opening. The method further includes removing the first absorption layer outside the opening in the sacrificial multilayer to form a first absorption pattern on a portion of the capping layer.

公开(公告)号：US11048158B2

公开(公告)日：2021-06-29

申请号：US15956189

申请日：2018-04-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Yih-Chen Su ,  Chi-Kuang Tsai ,  Ta-Cheng Lien ,  Tzu Yi Wang ,  Jong-Yuh Chang ,  Hsin-Chang Lee

IPC: G03F1/24 ,  G03F1/26 ,  G03F7/20 ,  H01L21/263 ,  G03F1/80 ,  G03F1/84

Abstract: A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.