Invention Grant
- Patent Title: Enclosure-to-board interface with tamper-detect circuit(s)
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Application No.: US16567034Application Date: 2019-09-11
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Publication No.: US11083082B2Publication Date: 2021-08-03
- Inventor: Kathleen Ann Fadden , James A. Busby , David C. Long , John R. Dangler , Alexandra Echegaray , Michael J. Fisher , William Santiago-Fernandez
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Heslin Rothenberg Farley & Mesiti P.C.
- Agent Tihon Poltavets, Esq.; Kevin P. Radigan, Esq.
- Main IPC: H05K5/00
- IPC: H05K5/00 ; H05K1/02 ; H05K1/18 ; H05K1/11 ; G06F21/00 ; G06F21/86 ; H05K5/02 ; H05K3/00

Abstract:
Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure-to-circuit board protection. The tamper-respondent assemblies include a circuit board, and an enclosure mounted to the circuit board along an enclosure-to-board interface. The enclosure facilitates enclosing at least one electronic component coupled to the circuit board within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and includes one or more tamper-detect circuits including at least one conductive trace disposed, at least in part, within the enclosure-to-board interface. The conductive trace(s) includes stress rise regions to facilitate tamper-detection at the enclosure-to-board interface. An adhesive is provided to secure the enclosure to the circuit board. The adhesive contacts, at least in part, the conductive trace(s) of the tamper-detect circuit(s) at the enclosure-to-board interface, including at the stress rise regions of the conductive trace(s).
Public/Granted literature
- US20200008295A1 ENCLOSURE-TO-BOARD INTERFACE WITH TAMPER-DETECT CIRCUIT(S) Public/Granted day:2020-01-02
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