- Patent Title: Stacked grid design for improved optical performance and isolation
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Application No.: US16559922Application Date: 2019-09-04
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Publication No.: US11121168B2Publication Date: 2021-09-14
- Inventor: Yun-Wei Cheng , Horng Huei Tseng , Chao-Hsiung Wang , Chun-Hao Chou , Tsung-Han Tsai , Kuo-Cheng Lee , Tzu-Hsuan Hsu , Yung-Lung Hsu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L27/146
- IPC: H01L27/146

Abstract:
A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening.
Public/Granted literature
- US20200013810A1 STACKED GRID DESIGN FOR IMPROVED OPTICAL PERFORMANCE AND ISOLATION Public/Granted day:2020-01-09
Information query
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