Invention Grant
- Patent Title: Method of forming film stacks with reduced defects
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Application No.: US16597466Application Date: 2019-10-09
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Publication No.: US11145504B2Publication Date: 2021-10-12
- Inventor: Zhijun Jiang , Ganesh Balasubramanian , Arkajit Roy Barman , Hidehiro Kojiri , Xinhai Han , Deenesh Padhi , Chuan Ying Wang , Yue Chen , Daemian Raj Benjamin Raj , Nikhil Sudhindrarao Jorapur , Vu Ngoc Tran Nguyen , Miguel S. Fung , Jose Angelo Olave , Thian Choi Lim
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/67 ; C23C16/44 ; C23C16/24 ; C23C16/40

Abstract:
A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.
Public/Granted literature
- US20200227258A1 METHOD OF FORMING FILM STACKS WITH REDUCED DEFECTS Public/Granted day:2020-07-16
Information query
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