Invention Grant
- Patent Title: High voltage metal-oxide-semiconductor (HVMOS) device integrated with a high voltage junction termination (HVJT) device
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Application No.: US16601998Application Date: 2019-10-15
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Publication No.: US11145713B2Publication Date: 2021-10-12
- Inventor: Karthick Murukesan , Wen-Chih Chiang , Chun Lin Tsai , Ker-Hsiao Huo , Kuo-Ming Wu , Po-Chih Chen , Ru-Yi Su , Shiuan-Jeng Lin , Yi-Min Chen , Hung-Chou Lin , Yi-Cheng Chiu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/66 ; H01L29/78 ; H01L21/8234 ; H01L29/10 ; H03K19/0185 ; H01L27/088 ; H01L27/092 ; H01L21/8238 ; H01L29/08 ; H01L29/423 ; H01L29/40

Abstract:
Various embodiments of the present application are directed towards an integrated circuit (IC) in which a high voltage metal-oxide-semiconductor (HVMOS) device is integrated with a high voltage junction termination (HVJT) device. In some embodiments, a first drift well and a second drift well are in a substrate. The first and second drift wells border in a ring-shaped pattern and have a first doping type. A peripheral well is in the substrate and has a second doping type opposite the first doping type. The peripheral well surrounds and separates the first and second drift wells. A body well is in the substrate and has the second doping type. Further, the body well overlies the first drift well and is spaced from the peripheral well by the first drift well. A gate electrode overlies a junction between the first drift well and the body well.
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Information query
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